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? semiconductor components industries, llc, 2002 july, 2002 rev. 6 1 publication order number: mc74ac374/d mc74ac374, mc74act374 octal d-type flip-flop with 3-state outputs the mc74ac374/74act374 is a highspeed, lowpower octal dtype flipflop featuring separate dtype inputs for each flipflop and 3state outputs for busoriented applications. a buffered clock (cp) and output enable (oe ) are common to all flipflops. ? buffered positive edgetriggered clock ? 3state outputs for busoriented applications ? outputs source/sink 24 ma ? see mc74ac273 for reset version ? see mc74ac377 for clock enable version ? see mc74ac373 for transparent latch version ? see mc74ac574 for broadside pinout version ? see mc74ac564 for broadside pinout version with inverted outputs ? act374 has ttl compatible inputs figure 1. pinout: 20 lead packages conductors (top view) 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 o 7 d 7 d 6 o 6 o 5 d 5 d 4 o 4 cp oe o 0 d 0 d 1 o 1 o 2 d 2 d 3 o 3 gnd pin assignment pin function d 0 d 7 data inputs cp clock pulse input oe 3state output enable input o 0 o 7 3state outputs figure 2. logic symbol o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 cp oe 1 20 pdip20 n suffix case 738 1 20 1 20 1 20 so20 dw suffix case 751 tssop20 dt suffix case 948e eiaj20 m suffix case 967 device package shipping ordering information mc74ac374n pdip20 18 units/rail mc74act374n pdip20 18 units/rail mc74ac374dw soic20 38 units/rail mc74ac374dwr2 soic20 1000 tape & reel mc74act374dw soic20 38 units/rail mc74act374dwr2 soic20 1000 tape & reel mc74ac374dt tssop20 75 units/rail mc74act374dt tssop20 75 units/rail mc74act374dtr2 tssop20 2500 tape & reel mc74ac374m eiaj20 40 units/rail mc74ac374mel eiaj20 2000 tape & reel mc74act374m eiaj20 40 units/rail mc74act374mel eiaj20 2000 tape & reel see general marking information in the device marking section on page 7 of this data sheet. device marking information http://onsemi.com
mc74ac374, mc74act374 http://onsemi.com 2 truth table inputs outputs d n cp oe o n h l h l l l x x h z h = high voltage level l = low voltage level x = immaterial z = high impedance = low-to-high transition functional description the mc74ac374/74act374 consists of eight edge triggered flipflops with individual dtype inputs and 3state true outputs. the buffered clock and buf fered output enable are common to all flipflops. the eight flipflops will store the state of their individual d inputs that meet the setup and hold time requirements on the lowtohigh clock (cp) transition. with the output enable (oe ) low, the contents of the eight flipflops are available at the outputs. when the oe is high, the outputs go to the high impedance state. operation of the oe input does not affect the state of the flipflops. figure 3. logic diagram cp d qq cp d qq cp d qq cp d qq cp d qq cp d qq cp d qq cp d qq d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 oe cp note: that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) 0.5 to +7.0 v v in dc input voltage (referenced to gnd) 0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) 0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage temperature 65 to +150 c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions.
mc74ac374, mc74act374 http://onsemi.com 3 recommended operating conditions symbol parameter min typ max unit v supply voltage ac 2.0 5.0 6.0 v v cc supply voltage act 4.5 5.0 5.5 v v in , v out dc input voltage, output voltage (ref. to gnd) 0 v cc v v cc @ 3.0 v 150 t r , t f input rise and fall time (note 1) ac devices exce p t schmitt in p uts v cc @ 4.5 v 40 ns/v r , f ac devices except schmitt inputs v cc @ 5.5 v 25 t t input rise and fall time ( note 2 ) v cc @ 4.5 v 10 ns/v t r , t f in ut rise and fall time (note 2) act devices except schmitt inputs v cc @ 5.5 v 8.0 ns/v t j junction temperature (pdip) 140 c t a operating ambient temperature range 40 25 85 c i oh output current high 24 ma i ol output current low 24 ma 1. v in from 30% to 70% v cc ; see individual data sheets for devices that differ from the typical input rise and fall times. 2. v in from 0.8 v to 2.0 v; see individual data sheets for devices that differ from the typical input rise and fall times. dc characteristics 74ac 74ac symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions y (v) typ guaranteed limits v ih minimum high level 3.0 1.5 2.1 2.1 v out = 0.1 v ugee input voltage 4.5 2.25 3.15 3.15 v or v cc 0.1 v 5.5 2.75 3.85 3.85 v il maximum low level 3.0 1.5 0.9 0.9 v out = 0.1 v au oee input voltage 4.5 2.25 1.35 1.35 v or v cc 0.1 v 5.5 2.75 1.65 1.65 v oh minimum high level 3.0 2.99 2.9 2.9 i out = 50 a ugee output voltage 4.5 4.49 4.4 4.4 v 5.5 5.49 5.4 5.4 *v in = v il or v ih 3.0 2.56 2.46 v 12 ma 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 24 ma v ol maximum low level 3.0 0.002 0.1 0.1 i out = 50 a au oee output voltage 4.5 0.001 0.1 0.1 v 5.5 0.001 0.1 0.1 *v in = v il or v ih 3.0 0.36 0.44 v 12 ma 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 24 ma i in maximum input 55 01 10 a v i =v cc gnd au u leakage current 5.5 0.1 1.0 a v i = v cc , gnd i oz maximum v i (oe) = v il , v ih au 3-state c 5.5 0.5 5.0 a v i = v cc , gnd current v o = v cc , gnd i old 2minimum dynamic ot tc t 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc .
mc74ac374, mc74act374 http://onsemi.com 4 dc characteristics (continued) symbol conditions unit 74ac 74ac v cc (v) parameter symbol conditions unit t a = 40 c to +85 c t a = +25 c v cc (v) parameter symbol conditions unit guaranteed limits typ v cc (v) parameter i cc maximum quiescent 55 80 80 a v in =v cc or gnd a u qu esce supply current 5.5 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc . ac characteristics (for figures and waveforms see section 3 of the on semiconductor fact data book, dl138/d) 74ac 74ac symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f maximum clock 3.3 60 110 60 mhz 33 f max frequency 5.0 100 155 100 mh z 33 t plh propagation delay 3.3 3.0 11 13.5 1.5 15.5 ns 36 t plh cp to o n 5.0 2.5 8.0 9.5 1.5 10.5 ns 36 t phl propagation delay 3.3 2.5 10 12.5 2.0 14 ns 36 t phl cp to o n 5.0 2.0 7.0 9.0 1.5 10 ns 36 t pzh out p ut enable time 3.3 3.0 9.5 11.5 1.5 13 ns 37 t pzh o utput e na bl e ti me 5.0 2.0 7.0 8.5 1.0 9.5 ns 37 t pzl out p ut enable time 3.3 2.5 9.0 11.5 1.5 13 ns 38 t pzl o utput e na bl e ti me 5.0 2.0 6.5 8.5 1.0 9.5 ns 38 t phz out p ut disable time 3.3 3.0 10.5 12.5 2.0 14.5 ns 37 t phz o utput di sa bl e ti me 5.0 2.0 8.0 11 2.0 12.5 ns 37 t plz out p ut disable time 3.3 2.0 8.0 11.5 1.0 12.5 ns 38 t plz o utput di sa bl e ti me 5.0 1.5 6.5 8.5 1.0 10 ns 38 *voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v. ac operating requirements 74ac 74ac symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed minimum t setup time, high or low 3.3 2.0 5.5 6.0 ns 39 t s d n to cp 5.0 1.0 4.0 4.5 ns 39 t h hold time, high or low 3.3 1.0 1.0 1.0 ns 39 t h d n to cp 5.0 0 1.5 1.5 ns 39 t cp pulse width 3.3 4.0 5.5 6.0 ns 36 t w high or low 5.0 2.5 4.0 4.5 ns 36 *voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac374, mc74act374 http://onsemi.com 5 dc characteristics 74act 74act symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level 4.5 1.5 2.0 2.0 v v out = 0.1 v ugee input voltage 5.5 1.5 2.0 2.0 v or v cc 0.1 v v il maximum low level 4.5 1.5 0.8 0.8 v v out = 0.1 v au oee input voltage 5.5 1.5 0.8 0.8 v or v cc 0.1 v v oh minimum high level 4.5 4.49 4.4 4.4 v i out = 50 a ugee output voltage 5.5 5.49 5.4 5.4 v *v in = v il or v ih 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 i oh 24 ma v ol maximum low level 4.5 0.001 0.1 0.1 v i out = 50 a au oee output voltage 5.5 0.001 0.1 0.1 v *v in = v il or v ih 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 i ol 24 ma i in maximum input 55 01 10 a v i =v cc gnd au u leakage current 5.5 0.1 1.0 a v i = v cc , gnd i cct additional max. i cc /input 5.5 0.6 1.5 ma v i = v cc 2.1 v i oz maximum v i (oe) = v il , v ih au 3-state c 5.5 0.5 5.0 a v i = v cc , gnd current v o = v cc , gnd i old 2minimum dynamic ot tc t 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent 55 80 80 a v in =v cc or gnd a u qu esce supply current 5.5 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. ac characteristics (for figures and waveforms see section 3 of the on semiconductor fact data book, dl138/d) 74act 74act symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f maximum clock 50 100 160 90 mhz 33 f max maximum clock frequency 5.0 100 160 90 mh z 33 t plh propagation delay 50 20 85 10 20 11 5 ns 36 t plh pro agation delay cp to o n 5.0 2.0 8.5 10 2.0 11.5 ns 36 t phl propagation delay 50 20 80 95 15 11 ns 36 t phl pro agation delay cp to o n 5.0 2.0 8.0 9.5 1.5 11 ns 36 t pzh output enable time 5.0 2.0 8.0 9.5 1.5 10.5 ns 37 t pzl output enable time 5.0 1.5 8.0 9.0 1.5 10.5 ns 38 t phz output disable time 5.0 1.5 8.5 11.5 1.0 12.5 ns 37 t plz output disable time 5.0 1.5 7.0 8.5 1.0 10 ns 38 *voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac374, mc74act374 http://onsemi.com 6 ac operating requirements 74act 74act symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed minimum t setup time, high or low 50 10 50 55 ns 39 t s setu time , high or low d n to cp 5.0 1.0 5.0 5.5 ns 39 t h hold time, high or low 50 0 15 15 ns 39 t h hold time , high or low d n to cp 5.0 0 1.5 1.5 ns 39 t cp pulse width 50 25 50 50 ns 36 t w cp pulse width high or low 5.0 2.5 5.0 5.0 ns 36 *voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c pd power dissipation capacitance 80 pf v cc = 5.0 v
mc74ac374, mc74act374 http://onsemi.com 7 ac 374 alyw ac374 awlyyww mc74ac374n awlyyww 74ac374 awlyww marking diagrams pdip20 so20 tssop20 eiaj20 act 374 alyw act374 awlyyww mc74act374n awlyyww 74act374 awlyww a = assembly location wl, l = wafer lot yy, y = year ww, w = work week
mc74ac374, mc74act374 http://onsemi.com 8 package dimensions pdip20 n suffix 20 pin plastic dip package case 73803 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc so20 dw suffix 20 pin plastic soic package case 751d05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
mc74ac374, mc74act374 http://onsemi.com 9 package dimensions tssop20 dt suffix 20 pin plastic tssop package case 948e02 issue a dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z eiaj20 m suffix 20 pin plastic eiaj package case 96701 issue o
mc74ac374, mc74act374 http://onsemi.com 10 notes
mc74ac374, mc74act374 http://onsemi.com 11 notes
mc74ac374, mc74act374 http://onsemi.com 12 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74ac374/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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